Renesas RX110

The Renesas RX110 are microcontrollers from Renesas, which are based on the RXv1 architecture.

Flash Banks

Flash bank	Base address	J-Link support	Flasher support	Loader
				Name	Bank size
Internal flash	0xFFFFE000/0xFFFFC000/0xFFFF8000/ 0xFFFF0000/0xFFE80000/0xFFE00000			Default	8/16/32/ 64/96/128 KB

Debugger Authentication

If necessary, a debugger authentication via RX ID Code is performed as part of the connect sequence.
See article on Renesas RX cores for further information.

Debug Mode

When using FINE interface, a debug mode is enabled as part of the connect sequence and disabled on debug session close.
Enabling / disabling the debug mode requires writing to the flash.
See article on Renesas RX cores for further information.

Supported debug interfaces

The following debug interfaces are supported:

• FINE