CVA CHIP CVM011x

From SEGGER Knowledge Base [STAGING]
Jump to navigation Jump to search

The CVA CHIP CVM011x are Cortex-M0+ based MCUs.

Supported devices

Refer to the supported device list for a full list of all supported CVM011x family devices, their corresponding names and connection diagrams.

Internal Flash

Supported Regions

Flash Bank Base address Size J-Link Support
PFlash[1]
0x00000000 Up to 224 KB
Info Region[2]
0x00200000 512 Bytes
DFlash 0x10000000 32 KB
  1. ↑ Program flash configuration field area starting at 0x00000400 with 1KB
  2. ↑ Info Region is not memory mapped. Base address 0x00200000 is therefore chosen arbitrary.
    Info Region is one-time-programmable only. Erase is not possible.

Option Byte Programming

The CVM011x series devices provides a program flash configuration field area (option bytes) which allow some "permanent" configuration as well as readout protection for the device. The option bytes become effective after a reset, or, if the read protection is set while a debugger is still connected through JTAG/SWD, become effective after a power-on-reset.

The option byte area consists of multiple configuration fields. After a reset, the values within these fields will be written into the corresponding registers. All complementary bytes are automatically set when writing the option bytes.

CVM011x
Address Register mapping
0x00000400 { backdoor keys[63:0] }
0x00000408 { FTFC_PFPRONT[27:0], Reserved[3:0], FTFC_DFPRONT[7:9], FTFC_EFPRONT[7:0], Reserved[15:0] }
0x00000410 { Reserved[3:0], FTFC_FSEC[5:4], FTFC_FSEC[7:6], Reserved[55:0] }
0x00000418 { FTFC_FSEC[1:0], Reserved[61:0] }
0x00000420 User defined Info


Note:

Writing 0xFF to FTFC_FSEC will read-protect the CVM011x . In order to keep the device unprotected you have to write the correct key value to FTFC_FSEC.

  • FTFC_FSEC = 0xF2

Connect Specifics

Up to V7.88n

  • If the FTFC_FSEC SECURE bit is set, J-Link software will show a popup with the option to unsecure the device via a mass-erase.
  • If any flash area is write protected via the FTFC_xFPRONT bits, J-Link software will show a popup with the option to unprotect all areas via a mass-erase.

Starting from V7.88n

  • If the FTFC_FSEC SECURE bit is set, J-Link software will show a popup with the option to unsecure the device via a mass-erase.
  • If any flash area is write protected via the FTFC_xFPRONT bits, J-Link software will show an information popup without any options.
Note:

Writing 0x01 to FTFC_PFPRONT will cause the Cfg Field to be protected. After a power-cycle this can only be recovered by an external mass erase via MDM-AP.

Find more information in the corresponding device reference manual.

Watchdog handling

  • The device has a watchdog WDOG.
  • The watchdog is fed during flash programming.

Reset

No device specific reset is necessary. The normal Cortex-M reset is performed.

See here for more information: https://kb.segger.com/J-Link_Reset_Strategies#Type_0:_Normal

Evaluation Boards